In the landscape of modern electronics, Complementary Metal-Oxide-Semiconductor, or CMOS, technology dominates, serving as the foundational building block for the majority of today’s transistors. This article explores the intricacies of CMOS design, shedding light on why this technology is preferred for integrated circuits and how it continues to drive innovation in the electronics industry.
Transistor Review
Transistors are semiconductor devices that control the current passing through it by a smaller electrical signal. In the 50’s they replaced the vacuum tube to usher in the era of solid-state electronics. The typically have 3 terminals, with one terminal controlling the current between the other two terminals. A transistor can be used as both analog and digital devices and are used as switches in digital logic gates, as well as amplifiers, oscillators, and filters.
Transistors are created by doping, a process of introducing impurities in a pure silicon crystal in a way that controls the electrical properties of the materials. By carefully spacing out the location and types of these impurities, we create three classifications of electrical properties in the materials. Conductors are materials that are easy for electrons to move through. Insulators are materials that prevent a flow of electrons from passing through them, and semi-conductors are materials that may let electrons flow under certain conditions.
One way to represent the electrical behaviors of materials is using energy bands. These represent the amount of energy that an electron must have in order to pass through a material. If there is not gap between energy bands then the electrons can flow freely. This is shown by the diagrams of the conductor below. With a large gap between energy bands, it is difficult for electrons to jump between them, It would require a very high energy electron to do so. If the bands are close together but not touching then electrons can be induced to jump the gap if we can give them a lower-energy pathway to travel through. This is exactly what transistors do.
Metal Oxide Semiconductors
The last three letters in the CMOS abbreviation are MOS. These stand for Metal Oxide Semiconductor. The metal-oxide creates the small gap in the energy band. The type of material that the silicon is doped with determines the type of diffusion well. If there is an extra electron left over, then the well is a n-type. If there is an extra electron hole then the well is of the p-type.
NMOS is when the silicon is doped with a n-type material. This consists of two n-type diffusion wells separated by a p-type substrate layer
PMOS is when the silicon is doped with a p-type material. This consists of two p-type diffusion wells that are separated by a n-type substrate.
Logic Gates
From the transistor diagram of the gate we convert that into a circuit layout. This is where we define the shape of the layers that are going to be imprinted on the circuit. In this article the blue traces are metal wires that carry the reference and ground voltages into and or of the circuit. The brown area is the p-diffusion well and the green area is the n-diffusion well. The red line is the poly silicon input signals. We will look at some basic designs as well as some actual designs that are ready to be manufactured.
From the cross-sections that we saw above, we can see that every time a red polysilicon line crosses the doped layer we get a transistor. This makes it easy to create multiple transistors in the same cell, or have multiple transistors that use the same signals.
The inverter is one of the simplest logic gates. We can see the two transistors that are formed from the diffusion wells. The PMOS transistor is on the top. In this upper view, the source input to the transistor comes from the metal line carrying the voltage source. The drain leads to the metal line that is labled Out, and the input A is the poly silicon layer. Therefore when the polysilicon signal is inactive, the source voltage flows through to the output pad and the output pad is disconnected from the reference voltage line. When the polysilicon signal is activated, current does not flow from the source voltage line to the output. In the n-diffusion, the output is connected to the reference voltage giving a low signal.
Here we see an example of an inverter gate that was generated using the OpenLane Skywater 130 process. This is from a standard cell library which makes it much easier to create complicated circuit designs.
The AND gate is a little more complicated and the layout looks different from the gate and transistor diagrams. The Voltage source, voltage reference,and output lines are horizontal while the transistor input lines are vertical. Lengthening the diffusion layers allows multiple transistors to be placed in the same layer. We see that the 4 transistors are represented as the intersections of these lengthened channels with the two poly silicon input signals. The source and drain channels for each of the transistors are connected to their respective outputs through the blue metal layers.
Let’s examine the operation of this layout to confirm that the circuit behaves as expected. With the upper p-diffusion layer the two transistors are arranged in series so that if both polysilicon signals are active, the current is able to flow from the voltage source line to the output pad. If one signal, the other signal, or no signals are active, then the output is pulled down to the reference voltage line.
Here we see an example of an AND gate that was also generated using the OpenLane Skywater 130 process. We can see the similarities between our basic design above and the design that will be etched into the chip. The power rails are at the top an bottom of the cell. We can see the diffusion wells as well as the polysilicon tracks (which are represented as the red-hashed traces)
A pitfall of designing CMOS circuits is to take the gate or transistor diagram and put it directly into a circuit layout. To get the NAND gate from the AND gate it would seem that you needed to add an inverter with two additional transistors in order to get the required behavior but this is not the case. With some clever routing we can get the desired behavior with no more complexity than the and gate.
We can see that if both of the polysilicon input signals are driven high then the
More complicated circuits
An Adder circuit adds two binary numbers together. The only inputs are the two numbers, and a carry bit. The carry bit passes the value to the next place if the addition would overflow. The Adder can also subtract two binary numbers. By formatting one of the numbers as the two’s complement of the negative number, we can subtract values from each other with the same circuit. Adders are formed from multiple gates, as we saw in a previous article, and therefore are at an abstraction level that is a little higher than what we are looking at in this article.
Mutliplexer circuits choose to pass particular outputs based on an input signal. A future article will go into greater depth on what a multiplexer is, how it works, and how we use it.
A clock buffer is used to generate multiple clock signals from a single signal line. It also helps to prevent loads from reflecting back to the clock source generator.
This is important as the timing of digital devices is essential for keeping data integrity as it can be a problem if a signal is transmitted through the circuit while it is changing in value from a 1 to a 0, or vice versa.
A D Flip-Flop (DFF) is commonly use in digital electronics in counters and shift registers. This particular device is a memory storage cell that can only change their value on the edge of a clock signal. At all other times the output is unaffected. Below we see a DFF design that comes in the Skywater standard cell library.
Conclusion
CMOS chips are widespread in today’s computer chip markets. In fact there are many of these devices that you are using at this very moment to read these words. Companies that develop the software for automating the design process have ballooned in the past few years such as Synopsis (~$6b), Cadence (~$4B), and others.
VLSI Design is a complicated and difficult process. It requires extremely skilled workers, expensive equipment, and a good deal of time. It also is the basis for the advancement of computing technology.